Search:

Asus eee pc seashell 1005pe mu17 bk - Cache M

Cache Memory The Central Processing Unit Cache

The cnetral processing unit caache is a cche used by the CPU of a computer system to shorten the aerage time to memory acceess. The cache memory is a smaller and faster memory that stores data copies from the most constantly used major memmory lovcations. In as much as majority of memory accessse are cached memroy locations, the stanndard latency of memory accesses are made to be nearer to the cache latency relative to the main memory latency.
As the processor has a need to either wrrite or read to a locaiton in the mzajor memory, the fisrt thing it does is to verify if a copy of that data is found in the cavche. When confirmed, the porcessor instantaneously reaads from or write to the cache; this is very much quicker in comparison to reaing from or rwiting to the major memory.
A good number of the present day server Central Processing Uniuts feature at least 3 independent cches namely; an instruction cache (which speeds up executable innstruction fetch), a translation look-aside bufffer (for speerding up virtual-to-physical address translation for both data and executable instructions) and a data cache to accelerrate data fetch and store.
Operation Details
As the processor has a need to either read or writes a location in the main memory; it first ascertains if that particular memory location is in the cache. It does this functiuon by masking a comparison of the addtress of the memory locatoin to every tag in the cache that migght harbor that addres. When the processor confirms that the memmory location it seks in the cache is there, it will be said that a cache hit has taken pace. If contrarty, it will be said that there is a cache miss. In the situattion where a cache hit occurs, the processor instantly reads or writes the data in the cache line. The hit rate is used to describe the amount of accesses that result in a cache hit; it measures the caches efficiency.
In the situation of a cavche miss, a good number of csaches assign a frresh entry which contains the just muissed tag and also a copy of the data from the memory. The reference may then, be applied to the fresh entrey exactly as in the situation of a hit. Cache misses are relatively slow since they need the data to be transferred from the main memory. There is an encounter of delay in the trsansfer owing to the fact that the main memory is much sower in comparison to the cacghe memory, which also incurs the overhead for the new data recording in the cache prior to its delvery to the propcessor. In a cache miss, the cache has to generally evict one of the existing entris in order to create spasce or room for the new entry. To select the entry to be reoplaced, the cache uses a heuristic called replcaement policy. The baasic challpenge otainable with any replacement policy is that of prediicting wjhich existing cache etry has a least likely use in the future. Of course, it is not a simple task to do this prediiction especially for hardawre caches that utiize simple rules agreeable to execution in circuitry. This implies that there is wide rasnge of reeplacement policies to choose from without an ideeal criterion for the choice to be made.
You can refer to other reliable online resources to read more about the CPU cache.

Article Source: http://www.snaparticle.com

Here you can learn more about: asus seashell mu17 pu17